Instructor
| Marek Syrzycki | marek@cs.sfu.ca |
Lecture: Tuesdays, 10:00 - 11:20, SECB 1010
Lecture: Thursdays, 10:00 - 11:20, SECB 1010
Recommended text book
"Digital Integrated Circuits" 2nd edition, J.M.Rabaey, A.Chandrasakan, B.Nikolic, ISBN 0-13-090996-3.
Recommended text book for Cadence CAD tool
"Digital VLSI Chip Design with Cadence and Synopsys CAD Tools", Erik Brunvand, ISBN: 0321547993.
Course Schedule and Grading Scheme.
Download NDA form for 0.35 micron CMOS technology.
Lecture slides:
3. MOS Transistors - Operation and Models.
Final grades
Project related:
Standard Cell template for 350nm CMOS
Project
Cadence tutorials
Getting Started with Cadence (Composer, Affirma, Virtuoso)
Getting Started with Cadence - Layout
Final grades
Very useful web sites:
San Jose State University IC Design Group's Homepage (prof. D. Parent)
CMOS Circuit Design, Layout, and Simulation (prof. R. Jacob Baker)
"SPICE" by Gordon W. Roberts and Adel S. Sedra (ISBN 0195108426)
SPICE Quick Reference Sheet (pdf, 14 pages)
Star HSPICE Manual - Avanti (pdf, 1714 pages)
Setting up and running CADENCE.
Entering and Navigating the Virtuoso LayoutPlus Editor
Link to the "SPICE" textbook Web page:
The newest HSPICE user manual is in ~/CMC/tools/hspice/manual directory.
Other HSPICE and Cadence information: