M. Syrzycki, Dual-gate MOS Transistor, (in Polish), Elektronika, No.10,1971. M. Patyra, M. Syrzycki, Design of MOS LSI Integrated Circuits (in Polish), Warsaw University of Technology Press, 1990. M. Grigoleit, and M. Syrzycki, Design and Characterization of Pseudo-DTL CMOS Gates, Electronics Letters, Vol.27, No.17, pp.1577-1579, 15th Aug 1991. M. Syrzycki, Negative Resistance MOS Transistor, IEEE Transactions on Electron Devices, Vol.ED-38(8), pp.1808-1814, Aug 1991. L. Carr, M. Syrzycki, A/D Signal Conversion in Current Domain for a Visual-to-Thermal Converter, 1993 Canadian Conference on Electrical and Computer Engineering CCECE'93, Vancouver, B.C., pp.688-691, Sep 14-17, 1993. B. Radanovic, M. Syrzycki, Current-Mode MOS Adders Using Multiple-Valued Logic, 1996 Canadian Conference on Electrical and Computer Engineering, CCECE'96, Calgary, pp.190-193, May 26-29, 1996. B. Lye, M. Syrzycki, Current-Mode A/D Converter Architectures for Integrated Sensor Systems, 1996 Canadian Conference on Electrical and Computer Engineering, CCECE'96, Calgary, pp.194-197, May 26-29, 1996. R. Ockey, M. Syrzycki, Optimization of a Latched Comparator for High-Speed Analog-to-Digital Converters, IEEE 1999 Canadian Conference on Electrical and Computer Engineering, CCECE'99, Edmonton, Alberta, pp.403-408, May 9-12, 1999. J. Lee, M. Syrzycki, Semiconductor Controlled Rectifier (SCR) Electrostatic Discharge (ESD) Protection Devices in Submicron CMOS Technology, IEEE 1999 Canadian Conference on Electrical and Computer Engineering, CCECE'99, Edmonton, Alberta, pp.409-414, May 9-12, 1999. K. Henderson, K. Iniewski, M. Syrzycki, CMOS ESD Protection Circuits Using Submicron MOS Transistors Operating in the Snapback Mode, IEEE 1999 Canadian Conference on Electrical and Computer Engineering, CCECE'99, Edmonton, Alberta, pp.415-420, May 9-12, 1999. K. Iniewski, M. Syrzycki, Gate-Coupled Structure for Enhanced ESD Input/Output Pad Protection in CMOS ICs, US Patents 5,910,874, Jun 8, 1999, and 6,128,171, October, 2000. Also patented in Canada, 2,223,199, October, 2001. R. Ockey and M. Syrzycki, Analysis of Manufacturability Factors for Analog CMOS ADC Building Blocks, Analog Integrated Circuits and Signal Processing Journal, Kluwer Academic Publishers, Vol.26, No 3, pp.239-255, Mar 2001. A. Gharbiya, and M. Syrzycki, Highly Linear, Tunable, Pseudo Differential Transconductor Circuit for the Design of Gm-C Filters, IEEE 2002 Canadian Conference on Electrical and Computer Engineering, CCECE'02, Winnipeg, Manitoba, May 12-15, 2002. K. Iniewski, B. Hagglund, M. Syrzycki, Gigabit per Second Mixed-Signal Integrated Circuits for Storage Area Networking, 10th International Conference on Mixed-Design of Integrated Circuits and Systems MIXDES 2003, Lodz, Poland, June 26-28, 2003 (invited paper). K. Iniewski, S. Voinigescu, M. Syrzycki, Process and Device Requirements for Mixed-Signal Integrated Circuits in Broadband Networking, 6th Symposium Diagnostics & Yield: Advanced Silicon Devices and Technologies for ULSI Era, Warszawa, Poland, June 22-25, 2003 (invited paper). K. Iniewski, S. Voinigescu, M. Syrzycki, Low Power 2.5 Gb/s Serializer For SOC Applications, IEEE 2004 Annual Symposium on VLSI, ISVLSI 2004, Lafayette, LA, February 19-20, 2004. K. Iniewski, A. Parameswaran, M. Syrzycki, Integrated Circuits for Optical Networking, 8th Electron Technology Conference, ELTE 2004, Stare Jablonki, Poland, April 19-22, 2004. M. Sadaghdar, K. Iniewski, M. Syrzycki, 11-bit Floating-Point Pipelined Analog to Digital Converter in 0.18 micron CMOS, IEEE 2004 Canadian Conference on Electrical and Computer Engineering, CCECE'04, Vol.3, pp.1253-1256, Niagara Falls, Ontario, May 2-5, 2004. K. Iniewski, S. Voinigescu, M. Syrzycki, Process and Device Requirements for Mixed-Signal Integrated Circuits in Broadband Networking, Journal of Telecommunication and Information Technology, No.1, 2004, pp.90-98 (invited paper). R. Sobot, S. Stapleton, M. Syrzycki, Continuous Time Bandpass Delta-Sigma Modulators for a Software Defined Radio, IEEE 2004 Canadian Conference on Electrical and Computer Engineering, CCECE'04, Niagara Falls, Ontario, May 2-5, 2004. R. Sobot, S. Stapleton, M. Syrzycki, Frequency Translation by Continuous Time Bandpass Delta-Sigma Modulators, IEEE 2004 Workshop on Wireless Circuits and Systems, WoWCAS 2004, Vancouver, British Columbia, May 21-22, 2004. K. Iniewski, S. Magierowski, M. Syrzycki, Phase Locked Loop Gain Shaping for Gigahertz Operation, 2004 IEEE International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, British Columbia, May 23-26, 2004, pp.157-160 (IV). K. Iniewski, V. Axelrad, A. Shibkov, A. Balasinski, M. Syrzycki, Design Strategies for ESD Protection in SOC, 4th IEEE International Workshop System-on-Chip for Real-Time Applications, IWSOC 2004, Banff, Alberta, July 19-21, 2004. K. Iniewski, M. Syrzycki, and S. Magierowski, Reconfigurable 2.5 GHz Phase-Locked Loop for System on the Chip Applications, 4th IEEE International Workshop System-on-Chip for Real-Time Applications, IWSOC 2004, Banff, Alberta, July 19-21, 2004. K. Iniewski, R. Badalone, M. Lapointe, and M. Syrzycki, SERDES Technology for Gigabit I/O Communications in Storage Area Networking, 4th IEEE International Workshop System-on-Chip for Real-Time Applications, IWSOC 2004, Banff, Alberta, July 19-21, 2004. R. Sobot, S. Stapleton, M. Syrzycki, Tunable Center Frequency CT BP Sigma-Delta Modulators for Wireless Transceivers, IEEE Vehicular Technology Conference 2004, Los Angeles, California, September 26-29, 2004. R. Sobot, S. Stapleton, M. Syrzycki, A Fractional Delay Sigma-Delta Upconverter, IEE Electronics Letters, Vol.41, Issue 23, pp.15-16, Nov. 2005. R. Sobot, S. Stapleton, M. Syrzycki, Tunable Continuous-Time Bandpass Sigma-Delta Modulators with Fractional Delays, IEEE Transactions on Circuits and Systems, Part I: Regular Papers, Vol.53, pp.264-273, Feb. 2006. H.I.Chen, E.K.Loo, J.B.Kuo, M. Syrzycki, Triple-Threshold Static Power Minimization Technique in High-Level Synthesis for Designing High-Speed Low-Power SoC Applications Using 90nm MTCMOS Technology, 20th IEEE Annual Canadian Conference on Electrical and Computer Engineering , CCECE'07, Vancouver, BC, 22-26 Apr. 2007. E.K.Loo, J.B.Kuo, M. Syrzycki, Low-Voltage Single-Phase Clocking Adiabatic DCVS Logic Circuit with Pass-Gate Logic, 20th IEEE Annual Canadian Conference on Electrical and Computer Engineering , CCECE'07, Vancouver, BC, 22-26 Apr. 2007. R. Sobot, S. Stapleton, M. Syrzycki, Fractional Sigma-Delta Modulator in SiGe, 20th IEEE Annual Canadian Conference on Electrical and Computer Engineering , CCECE'07, Vancouver, BC, 22-26 Apr. 2007. H.I.Chen, E.K.Loo, J.B.Kuo, M. Syrzycki, Triple-Threshold Static Power Minimization in High-Level Synthesis of VLSI CMOS, 17th Intern. Workshop on Power and Timing Modeling, Optimization and Simulation: Integrated Circuit and System Design , PATMOS'07, Gothenburg, Sweden pp.453-462, Sep. 2007. C. Zhang, M. Syrzycki, Modifications of a Dynamic-Logic Phase Frequency Detector for Extended Detection Range, 53rd IEEE International Midwest Symposium on Circuits and Systems , MWSCAS 2010, Seattle, WA, 1-4 Aug. 2010. Chin-Hsin Lin, M. Syrzycki, Pico-Second Time Interval Amplification, International System On Chip Design Conference , ISOCC 2010, Incheon, Korea, 22-23 Nov. 2010. C. Zhang, Ming-Cheng Lin, M. Syrzycki, Process Variation Compensated Voltage Controlled Ring Oscillator with Subtraction-Based Voltage Controlled Current Source, 24th IEEE Canadian Conference on Electrical and Computer Engineering , CCECE 2011, Niagara Falls, ON, 8-11 May 2011. Ming-Cheng Lin, M. Syrzycki, Current Source Transistor Optimization Methodology for Noise Optimized Charge Sensitive Amplifier with Fast Shaper, 24th IEEE Canadian Conference on Electrical and Computer Engineering , CCECE 2011, Niagara Falls, ON, 8-11 May 2011. Chin-Hsin Lin, M. Syrzycki, Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time Resolution, Circuits and Systems, Vol.2, No.4, Oct. 17, 2011 , DOI: 10.4236/cs.2011.24050. C. Zhang, T. Au, M.Syrzycki, A High Performance N-MOS Switch High-Swing Cascode Charge Pump for Phase-Locked Loops, 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012 , pp.554-557, Boise, ID, Aug. 5-8, 2012. T. Au, M. Syrzycki, Investigation of Shallow Trench Isolation Diodes as Electrostatic Discharge Protection Devices in Deep-Submicron CMOS Processes, 26th IEEE Canadian Conference on Electrical and Computer Engineering , CCECE 2013, Regina, SK, May 5-8, 2013. A. Tanskanen, B. Bahreyni, M. Syrzycki, Charge-based Femto-Farad Capacitance Measurement Technique for MEMS Applications, 29th IEEE Canadian Conference on Electrical and Computer Engineering , CCECE 2016, Vancouver, BC, pp.134-137, May 15-18, 2016.
For author's copy of the publication, send an e-mail to marek@cs.sfu.ca.