Overview

Description

CALENDAR DESCRIPTION:

Digital system design considerations including methodologies, specification, SoC partitioning, fault tolerance, design reuse, debugging and verification.

COURSE DETAILS:

This course focuses on practical applications of advanced digital design concepts. Topics will be related to design with embedded processors and application specific architectures. The course is focused around the specification, design and implementation of a significant project to be implemented on a FPGA. Although, the course projects will be implemented using FPGAs, many of the design concepts will also applicable to ASIC designs.

Lectures will cover topics such as design flows, design with HDLs, good design practices, timing, clock domains, high-speed data links, Intellectual Property (IP) reuse, and FPGA
technologies. Some lectures will also be devoted to issues in the lab, design reviews of some projects and two in-class tests. (There will be no final exam)

Labs and projects will be implemented on an FPGA design board. The goal of the project is to provide a real design opportunity using state-of-the-art tools and technology.

The objective of the project is to provide students with some practical experience implementing more complex designs, highlighting approaches for designing large digital systems
encompassing many gates and a lot of software. Students will need to leverage knowledge obtained from previous courses, such as:

• At the hardware level, this will call upon knowledge of computer architecture, logic design, and circuit design.
• The software component of these projects will not have the benefit of a common operating system that abstracts the hardware from the students. Students will need to apply their knowledge of operating systems, compilers, algorithms and networking at a low-level where they interact directly with the hardware. This is often applicable to embedded system designs.
• Depending on their choice of design projects, students will have to call upon the algorithms they have learned in areas such as control systems, digital signal processing, multimedia, networking, and data structures as integral parts of the overall architecture of their system. They will have to produce both hardware and software that work in concert to create the overall system.

Effort will be required to learn how to push these modern design automation tools to be a productive part of the overall design process. Anyone can use tools if they work all the time by pushing the right buttons. Understanding what the tools are trying to do means that when things inevitably break, students will know where to look to find the problem, and how to get around it.

Each lab group will have two individuals (unless specifically permitted by the instructor). It would be preferable to not have graduate and undergraduate lab pairings. You will be given a board used for the labs and your final project: You are responsible for the well being and proper care of this board!!

The Course:
This is a course on the design of large digital systems. Digital systems lie at the heart of almost any electronic system including consumer devices, cell-phones, signal processing systems, computers, biomedical devices, etc. This course will provide the opportunity to design real digital systems containing significant amounts of hardware and software.
Most of the course will be focused on a design project, where you will have the opportunity to design a real system using state-of-the-art tools and technology.

Course Web Page:
The course web page is at http://www.ensc.sfu.ca/~lshannon/courses/ensc452/. Handouts will be posted. I will try to post lecture notes before each lecture so that you can print them out before class. We will be using Canvas, mostly for the Discussion board. However, the majority of the course materials can be found on the course web page.

Course Discussion Board:
All students must regularly check the course Discussion board. All course related questions must be posted to the Discussion board. Both good questions and good answers will contribute towards bonus marks for the course. Announcements and hints regarding the labs and project will be posted here. I have also created class mailing lists so
that last minute announcements can be sent when necessary.

Labs:
There is a weekly 4 hour lab component to the course. Initially these lab periods will be used to perform tutorials to learn about Xilinx’s system software and hardware. The remaining labs will be used to work on the final project. Students are required to follow the lab policies outlined by the School of Engineering Science along with those
provided in the lab handouts. Please read them carefully.

Grading

Materials

RECOMMENDED READING: