Welcome to the HiAccel lab website, which is directed by Prof. Zhenman Fang. We work on customizable computing with specialized hardware acceleration. HiAccel stands for High-performance, High energy-efficient, High-level software-defined, Hierarchical hardware Acceleration architectures and systems. We are building our lab. If you are interested in joining the HiAccel lab, please refer to the recruiting page.

HiAccel Founder and Director

  
  Prof. Zhenman Fang

Current HiAccel Members



  Haisheng Fu, Postdoc, 11/2023 - present
  Co-supervised with Prof. Jie Liang (Primary supervisor: Prof. Liang)
  PhD, Xi'an Jiaotong University, China, 2023
  Visiting PhD, Simon Fraser University, 11/2021 - 10/2023
  Papers: [C35, ICASSP 2024][C34, DCC 2024]


  Alec Lu, PhD student, since Sept 2018
  Transferred from MASc to PhD since Jan 2020
  Co-supervised with Prof. Lesley Shannon (Primary supervisor: Prof. Fang)
  Bachelor, Simon Fraser University, Canada, 2018
  Papers: [C31, FCCM 2023][C30, DATE 2023][C29, HPCA 2023][C28, ECCV 2022][C25, FPL 2022][C23, FPGA 2022]
                [C20, FPGA 2021][C19, FPT 2020][C14, FCCM 2019][J15, TRETS 2023][J13, TRETS 2023][J9, TRETS 2022]
                [J7, TRETS 2022][A13, DAC 2022 LBR][A12, DAC 2022 LBR][A11, DAC 2022 WIP]
  Award: FPGA 2021 Paper [C20] Highlighted in ACM TRETS Special Issue
  Award: SFU Graduate Travel and Research Award, Summer 2023
  Intern: Huawei Big Data Team, Canada, 12/2022 - 4/2023; Meta, Redmond, WA, USA, 6/2022 - 10/2022
  
  Xingyu Tian, PhD student, since Sept 2019
  Transferred from MASc to PhD since May 2021
  Bachelor, Shanghai Jiao Tong University, China, 2019
  Papers: [C33, FPGA 2024][C32, FCCM 2023][J14, TRETS 2023][J13, TRETS 2023]
  Award: FPGA 2024 Paper [C33] with the Highest Review Score
  
  Ahmad Sedigh Baroughi, PhD student, since Sept 2023
  MASc, University of Tabriz, Tabriz, Iran, 2018
  
  Qilin Hu, Visiting PhD student, since Nov 2023
  PhD student, Hunan University, China


  Kenny Liu, Accelerated MASc student, since May 2021
  MASc program since May 2022
  Bachelor/MASc combined program, Simon Fraser University, Canada
  Papers: [C29, HPCA 2023][J15, TRETS 2023]
  Award: NSERC USRA (Undergraduate Student Research Awards), 2021
  
  Junzhe Liang, MASc student, since Sept 2021
  Bachelor, University of Melbourne, Australia, 2021
  
  Manoj BR, MASc student, since Sept 2022
  Bachelor, Ramaiah Institute of Technology, Bengaluru, India, 2022
  Papers: [C33, FPGA 2024]
  Award: FPGA 2024 Paper [C33] with the Highest Review Score
  Award: Mitacs Globalink Graduate Fellowship, 2022
  
  Abdul Wadood, MASc student, since Sept 2022
  Bachelor, Pakistan Institute of Engineering and Applied Sciences, Pakistan, 2019
  Intern: Huawei Big Data Team, Canada, 12/2022 - present
  Other industry experience: Alba Engineering Company and Turing, Pakistan, 2019-2022
  
  Dilshan Sampath, MASc student, since Sept 2022
  Bachelor, University of Moratuwa, Sri Lanka, 2018
  Industry experience: Synopsys Inc., Sri Lanka, 2018-2022
  
  William Xue, Accelerated MASc student, since Sept 2022
  MASc program since Jan 2023
  Award: NSERC USRA (Undergraduate Student Research Awards), 2022; BC Graduate Scholarship, 2023
  Bachelor/MASc combined program, Simon Fraser University, Canada
  
  Philip Stachura, Accelerated MASc student, since Sept 2023
  Bachelor/MASc combined program, Simon Fraser University, Canada
  
  Akhil Raj Barnawal, MASc student, since Sept 2023
  Bachelor, BITS Pilani, India, 2020
  Industry experience: Micron and Imagination Technologies, India, 2020-2023

Past HiAccel Members


Lab Facility

We have built a modern 10-node cluster that has 16 Xilinx Alveo FPGA boards, 4 Samsung/Xilinx SmartSSD FPGA boards, and 3 Nvidia V100 GPU boards.


Sponsors

We thank the generous funding from all sponsors (no specific order)!